German laid-open patent document DE 10 2008 04 3084 A1 relates to the realization of piezo resistors in a monocrystalline silicon layer by introducing suitable doping into the layer surface. In this printed publication it is proposed to embed the doped resistance region in silicon oxide in order to insulate the piezo resistor from the adjoining layer material and to prevent the occurrence of leakage currents at higher ambient temperatures T>200° C., in particular.
In DE 10 2008 04 3084 A1, a pressure-sensor element, which can be used at high temperatures and has a sensor diaphragm and rear-side pressure connection, is described as one possible use of such insulated piezo resistors. In this case, the piezo resistors are developed in the region of the sensor diaphragm and used for signal acquisition. They have high sensitivity to mechanical stress and are robust even in the long term.
Furthermore, pressure-sensor elements having a rear-side pressure connection to the sensor diaphragm and front-side cap are known, which cap encloses a reference volume or a reference pressure. This type of sensor element is characterized by especially high media resistance. Since the electrical supply lines and the pressure connections are routed separately, i.e., from the front side of the component and from the rear side of the component, neither the electrical supply lines nor the piezo resistors come into contact with the measuring medium. The cap is usually realized in the form of a cap wafer, which is bonded to the sensor wafer.
The cap wafer restricts the possibilities for miniaturizing the pressure-sensor element known from practice, both with regard to the chip surface and the overall height. For example, in addition to the diaphragm area, the chip surface must always be provided with a bond frame region for the cap wafer. The mounting of the known sensor element is also problematic since a flip-chip assembly is out of the question because of the design with the cap wafer.